WSPLC 2009 Programme


The workshop has featured seven technical sessions, a keynote speech and a tutorial session. It took place at "Palazzo Antonini", Via Petracco 8, Udine. The poster presentations have been displayed over the full two days.

The Programme, the Proceedings, and the Keynote Speech are freely downloadable . The proceedings include both the papers and the tutorial material. The papers will be soon downloadable also from the archive of publications on Power Line Communications and related issues accessible from PLC DocSearch


WSPLC09 PROGRAMME DOWNLOAD

WSPLC09 PROCEEDINGS DOWNLOAD (36 MB)

WSPLC09 KEYNOTE SPEECH DOWNLOAD


WSPLC 09 Program timetable
Thursday, October 1 Friday, October 2
8.00 - 8.40: Registration

8.40 - 9.00: Welcome Message and Introduction
           prof. A. F. De Toni, Dean of the Faculty of Engineering
           prof. A. M. Tonello, WSPLC 09 Chair,
           University of Udine, Italy

9.00 - 10.20: Session A
           Channel Modeling I
           chair: F. J. Canete, University of Malaga, Spain

10.20 - 10.50: Coffee Break and Session B (Poster)
           System Implementations and Applications
           chair: M. Katayama, Nagoya University, Japan

10.50 - 11.50: Keynote Speech
           Future and Challenges for DSL Systems
           Dr. Axel Clausen, Infineon Technologies, Austria

11.50 - 12.30: Session C
           Multicarrier Modulation Part I
           chair: S. Weiss, University of Strathclyde, Scotland

12.30 - 14.00: Lunch

14.00 - 15.00: Session D
           Multicarrier Modulation Part II
           chair: P. Siohan, Orange Labs, France

15.00 - 15.20: Coffee Break and Session B (Poster)
           System Implementations and Applications
          
15.20 - 18.00: PLC Tutorial
           Advances towards Gbps in-home PLC networks:
           The OMEGA project
           chair: A. Tonello, University of Udine, Italy

19.30 - 22.30: Social Event
8.00 - 8.40: Registration

8.40 - 9.00: Warmup and Free Technical Discussion

9.00 - 10.20: Session E
           Channel Modeling II
           chair: P. Pagani, Orange Labs, France

10.20 - 10.50: Coffee Break and Session B (Poster)
           System Implementations and Applications
           chair: A. Tonello (University of Udine, Italy)

10.50 - 12.30: Session F
           Signal Processing and Analysis
           chair: J. A. Cortes, University of Malaga, Spain

12.30 - 14.00: Lunch

14.00 - 15.20: Session G
           Systems, Applications and Resource Allocation
           chair: R. Lehnert, University of Dresden, Germany

15.20 - 15.45: Coffee Break and Session B (Poster)
           System Implementations and Applications
          
15.45 - 16.00: Workshop Closure


16.30 - 18.30: Guided Tour












Session Details
Session A: Channel Modeling I, Thursday 9.00-10.20
MIMO Capacity of Inhome PLC Links up to 100 MHz        
R. Hashmat (1), P. Pagani (1), T. Chonavel (2), ( 1: Orange Labs, France), (2: Telecom Bretagne, France)                     

Simulation of Channel Characteristics for Complex Networks
A. Lehmann, K. Kolle, (Ahrus University, Denmark)

New Results on Top-down and Bottom-up Statistical PLC Channel Modeling
A. Tonello, F. Versolatto, (University of Udine, Italy)

Characterization of PLC Communication Channel: A Networking Perspective
E. Malacasa, G. Morabito (University of Catania, Italy)

Session B (Poster): System Implementations and Applications, Thur. 10.20-10.50, 15.00-15.20, Fri. 10.20-10.50, 15.40-16.00
Communication Architecture of Smart Grids to Manage the Electrical Demand
R. Mora (1), A. Lopez. (2), D. Roman (2), A. Sendin (3), I. Berganza (3), (1:Siemens, Spain), (2: Cedetel, Spain), (3: Iberdrola, Spain)

A Novel Multi-power Silicon Platform for PRIME Full System Integration in a Single Chip
A. Lasciandare (1), S. Bois (1), P. Bisaglia (1), A. Moscatelli (2), (1: Dora, Italy), (2: ST Microelectronics, Italy)

Design and Test of a Microcontroller Peripheral for Grid-Aware Networked Digital Appliances
A. Ricci (1), B. Vinerba (2), E. Smargiassi (2), I. De Munari (1), V. Aisa (2), P. Ciampolini (1), (1: University of Parma, Italy), (2: Indesit Company, Italy)

Gateways between Broadband and Narrowband Power Line Communication Systems - Solutions for Multimedia Devices
P. Lucchini, M. Lutman, M. Capobianco (Sipro, Italy)

New Proposed Integrated System of Visible Free Space Optical with PLC
S. E. Alavi, A. S. M. Supa 'at, S. M. Idrus, S. K. Yusof, (Universiti Teknologi Malaysia, Malaysia)

A Very Low Area ADC Architecture Capable of Supporting the Analog Front End of Powerline Communication Systems
N. Petrellis, M. Birbas, J. Kikidis, A. Birbas, (Analogies S.A., Greece)

Power Line Channel Models: Comparisons Between Different Modeling Adopted in BPLC Systems
J. Anatory (1), N. Theethayi (2), N. H. Mvungi (1), (1:University of Dodoma, Tanzania), (2: Uppsala University, Sweden)

Efficient and Reliable Power Line Communications through Coding and Diversity Techniques
Z. Shi (1), J. Li (2), (1:University of Elec. Sci. and Tech., Chengdu, China), (2: Lehigh University Bethlehem, USA)

Session C: Multicarrier Modulation, Part I, Thursday 11.50-12.30
Some (Known) Facts on Multicarrier Communication
R. Raheli (1), M. Franceschini (2), R. Pighi (3), G. Ferrari (1), (1: University of Parma, Italy), (2: IBM T. J. Watson Research Center, USA), (3: Selta S.p.a., Italy)

HS-OQAM PLC: Long Prototype Filter or Equalizer?
H. Lin, P. Siohan, (France Telecom, France)

Session D: Multicarrier Modulation, Part II, Thursday 14.00-15.00
An Oversampled Modulated Filter Bank Transmultiplexer With Precoding and Equalisation
S. Weiss, P. Yarr, W. Al-Hanafy, A. P. Millar, C-H Ta, (University of Strathclyde, Scotland)

Coded OFDM vs. Wavelet-OFDM and Circular Wavelet-OFDM for Power Line Communications
L. Zbydniewski, T. P. Zielinski, (AGH University of Science and Technology, Poland)

Performance Analysis of Asynchronous MC-CDMA Long Sequences for PLC Systems with Impulsive Noise
I. Val (1), F.J. Casajus-Quiros (2), (1: Ikerlan-IK4, Spain), (2: Public University of Madrid, Spain)

Session E: Channel Modeling II, Friday 9.00-10.20
High-frequency Characterization of a Medium Voltage PLC Transmission System
F. Campagna, M. Quarantelli, R. Pighi, (Selta Spa, Italy)

Effect of MV/LV Transformer Substations on MV Power Line Signals Propagation
C. Tornelli, L. Capetta, (ERSE Spa, Italy)

PLC Technology: Characteristics of the Radiated Field and TEMPEST Considerations
L. Diquelou, P. Laly, L. Kone, P. Degauque, (University of Lille, France)

PLC in Aircraft: Channel Modelling
I. Junqua (1), V. Degardin (2), M. Lienard (2), S. Bertuol (1), P. Degauque (2), (1: ONERA/DEMR, France), (2: University of Lille, France)

Session F: Signal Processing and Analysis, Friday 10.50-12.30
Distortion Evaluation of DMT Signals on Indoor Broadband Power-line Channels
J. A. Cortes, L. Diez, F. J. Canete, J. T. Entrambasaguas, (University of Malaga, Spain)

Phase Compensation for Narrowband PLC Channels with Cyclic Time-Varying Features
Y. Sugiura, T. Yamazato, M. Katayama, (Nagoya University, Japan)

Using the Outdoor Lighting Infrastructure for Wireless Services
M. Chiani (1), E. Paolini (1), A. Giorgetti (1), A. Grossi (2), M. Pensalfini (2), (1: University of Bologna, Italy), (2: UMPI R&D, Italy)

Modulation Diversity in Wideband In-Home PLC
H. Lin, P. Siohan, (France Telecom, France)                             


Session G: Systems, Applications and Resource Allocation, Friday 14.00-15.20
Power-constrained Physical-Layer Goodput Maximization for PLC Links
M. Biagi, E. Baccarelli, N. Cordeschi, V. Polli, T. Patriarca, (University of Rome, Italy)

Bit Rate Maximization for Multicast LP-OFDM Systems in PLC Context
A. Maiga, J-Y. Baudais, J-F. Helard, (IETR/INSA, France)

Channel Reuse Improvement for Coexistence between Access and In-Home PLC Systems with Dynamic Resource Allocation
L. P. Do, R. Lehnert, (University of Dresden, Germany)

Future High Speed In-Vehicle PLC Networks
F. Nouvel, P. Tanguy, (IETR/INSA, France)



Udine1 Udine2 Udine3

WSPLC 2009 Contact:

wsplc09@uniud.it

Chair:

Andrea M. Tonello
University of Udine
email: tonello@uniud.it
phone: +39 0432 558042
fax: +39 0432 558251


Technical Sponsors:

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Institutional Sponsors:

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