We gratefully acknowledge EverBeing International Corp. for the donation of a 6" probe station and 4 point probe measurement system to our lab. The equipment was successully installed by Dr. Pao-Kuei Tang (CEO) on September 23rd and will be used for educational and research activities with our students.
Post-Doctoral positions in the Nanoelectronics group
Modeling and simulation of nanoelectronic devices for low power switching and sensing applications: Mail to email@example.com for more information.
Topics for Master Thesis - Argomenti di Tesi di Laurea Specialistica
Caratterizzazione sperimentale e simulazione numerica di dispositivi nano-elettronici per applicazioni a basso consumo negli scenari Internet of Things, Internet of Everything e Smart Health (transistori in tecnologia CMOS e materiali d'avanguardia, nanosensori elettronici integrati). Per ulteriori informazioni rivolgersi al docente
Nanometer size MOSFETs in augmented silicon and III-V compound semiconductor channel materials
Modeling and simulation of nanoelectronic ion- and bio-sensors
Carrier transport in Ultra thin body SOI devices
Hot carrier effects characterization and modeling
Flash EEPROM operation and reliability
Hot carrier induced luminescence in Silicon devices
Impact ionization in Silicon Bipolar transistors
Design of high frequency circuits for telecom applications in bulk and FinFET technologies
The nano-electronics group at the DPIA, University of Udine is currently involved in the following research projects (last updated June 2017):
European Flag-ERA HESN project CONVERGENCE - Frictionless Energy Efficient Convergent Wearables For Healthcare And Lifestyle Applications
(2017-2020) coordinated by the Udine unit of the IUNET consortium.
European FP7 Strep project E2SWITCH - Energy Efficient Tunnel FET Switches and Circuits
Italian MIUR project PRIN 2015 - Rivelatori di raggi X in semiconduttori ad alto numero atomico per sorgenti di nuova generazione e imaging medicale (2016-2019) coordinated by the Udine unit.
Research contract with Infineon Technologies Villach on High Speed Serial Interfaces (HSSI)
The nano-electronics group at the DPIA, University of Udine has been involved in the following research projects (last updated June 2017):
European FP7 Strep project III-V-MOS - Technology CAD for III-V Semiconductor-based MOSFETs
www.iii-v-mos-project.eu (2013-2017) coordinated by the Udine unit of the IUNET consortium.
European Working Group ULIS - Ultimate Integration on Silicon (5FP, 1999-2000)
European Strep Project NESTOR - New Double Gate Transistors (5FP, 2002-2004)
European Coordination action EUROSOI - Silicon on Insulator Technology Devices and Circuits www.eurosoi.org (6FP, 2004-2006)
European Integrated Project PULL-NANO - PULLing the limits of NANO-CMOS electronics (6FP, 2006-2008)
European Network of Excellence NANOSIL - SIlicon-based NAnostructures and naNOdevices
www.nanosil-noe.eu (7FP, 2008-2011).
European Coordination Action GUARDIAN ANGELS - Guardian Angels for a Smarter Planet
European ENIAC-JTI project MODERN - Modeling and Design of Reliable process-variation-aware
Nanoelectronic devices, circuits and systems
European Network of Excellent NANOFUNCTION - Beyond CMOS Nanodevices for Adding Functionalities to CMOS
www.nanofunction.eu (7FP, 2010-2013).
European Strep project STEEPER - Steep Subthreshold Slope Switches for Energy Efficient Electronics
www.steeper-project.eu (7FP, 2010-2013).
European Strep Project GRAND - Graphene-based Nanoelectronic Devices www.grand-project.eu (7FP, 2008-2010).
European Integrated Project GOSSAMER - Gigascale Oriented Solid State flAsh Memory for EuRope www.fp7-gossamer.eu (7FP, 2008-2010).
European FP7 Strep project GRADE - Graphene-based Devices and Circuits for RF Applications www.grade-project.eu (2012-2016).
Italian MIUR project FIRB 2001 - RBNE012N3X - Sistemi miniaturizzati per l'elettronica e la fotonica
Italian MIUR project FIRB 2006 - RBIP06YSJJ - Tecnologie innovative per lo sviluppo di memorie non volatili ad alta densità
Italian MIUR project FIRB Futuro in Ricerca - RBFR10XQZ8 - Novel device and circuit concepts for energy-efficient electronics
Italian MIUR project PRIN 2000 - Permeable gate CMOS circuits: are they feasible ?
Italian MIUR project PRIN 2002 - Sub 0.1 micron Bulk and SOI CMOS Technologies for High Performance and Low Power Applications
Italian MIUR project PRIN 2004 - Innovative Architectures and Models for nanoMOSFETs
Italian MIUR project PRIN 2006 - Conventional (bulk) versus emerging nanoscale CMOS technologies: a comparative evaluation from the device to the system level
Italian MIUR project PRIN 2008 - Modeling and simulation of graphene nanoribbon FETs for high-performance and low-power logic applications (GRANFET)
Research contract with Taiwan Semiconductor Manufacturing Company - TSMC
Research contract with Philips research Eindohoven
Research contract with Philips research Leuven
Research contract with NXP Leuven
Research contract with Infineon Technologies Munich
Research contract with Infineon Technologies Villach
International PhD programme in Information and Industrial Engineering
Luca Selmi is presently coordinating a dedicated project on the internationalization of the DPIA Doctoral school on Information and Industrial Engineering.
The project implies structured student, teacher and course exchanges, in particular with the Information Engineering Doctoral School
of the INPG (Institute National Politechnique de Grenoble). At the end of the PhD programme the students get the double PhD degree according to the Italian and French regulations. The programme is currently funded by the Vinci program of the Universita' Italo-Francese and the
MIUR Cooperlink program.