INFOS 2001
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Dipartimento di Ingegneria Elettrica, Gestionale e Meccanica
Site: via delle Scienze, 208 - 33100 Udine - Italy
Administrative Secretary's Office: +39 0432 558251 (fax)
 

Session Contributions

WEDNESDAY, June 20, 2001
GENERAL CONFERENCE
Conference Opening
GENERAL CONFERENCE
Session 1.1: Oxide Breakdown
Chairpersons: Michael Uren, Robin Degraeve
GENERAL CONFERENCE
Session 1.2: Thin Oxide Modeling
Chairpersons: Pierre Fazan, Fred Koch

Session P.1: Poster Session
Chairpersons: Valery V. Afanas'ev, Hisham Massoud, Max Schultz

WORKSHOP ON MEMORIES
Session M.1:Memory architectures and reliability
Chairpersons: Alessandro Paccagnella, Frans Widdershoven
THURSDAY, June 21, 2001
GENERAL CONFERENCE
Session 2.1: Oxide and Interface Characterization Techniques
Chairperson: Henryk Przewlocki
Session 2.2: New Memory Devices
Chairperson: Alberto Modelli
HIGH K DIELECTRICS WORKSHOP
Session K.1: High-k Material Properties
Chairpersons: Martin Green, Hiroshi Iwai
Session K.2: Process Integration and Reliability
Chairpersons: Martin Green, Hiroshi Iwai
FRIDAY, June 22, 2001
GENERAL CONFERENCE
Session 3.1: Technology
Chairpersons: Andre Stesmans
Session 3.2: Alternative Dielectrics and Reliability
Chairpersons: Joan Ramon Morante
SOI WORKSHOP
Session S.1: Transport properties in SOI devices
Chairpersons: Sorin Cristoloveanu
Session S.2: New SOI Device Concepts
Chairpersons: William Eccleston
GENERAL CONFERENCE
Session 3.3: Thin Oxide Reliability Session
Chiarpersons: Jordi Sune, Gilles Reimbold
SOI WORKSHOP
Session S.3: Transient Effects and Reliability of SOI Devices
Chairpersons: Olof Engstrom, James Stathis

Detailed Conference Program

WEDNESDAY, June 20, 2001
TIME
09.00 - 09.20 a.m. Conference Opening

GENERAL CONFERENCE
Session 1.1: Oxide Breakdown
Chairpersons: Michael Uren, Robin Degraeve

09.20 - 09.40 a.m. S. Takagi
Carrier Trasport Properties of Thin Gate Oxides after Soft and Hard Breakdown
09.40 - 10.00 a.m.
10.00 - 10.20 a.m. B.E. Weir, M. A. Alam, P. J. Silverman, Soft Breakdown at All Positions Along the N-MOSFET
10.20 - 10.40 a.m. E. Wu, J. Sun‚, W. Lai, E. Nowak, J. McKenna, A. Vayshenker, D. Harmon, Interplay of Voltage
10.40 - 11.10 a.m. Coffee Break
11.10 - 11.30 a.m. S. Lombardo
Intrinsic Dielectric Breakdown of Ultra-thin Gate Oxides
11.30 - 11.50 a.m.
11.50 - 12.10 a.m. F. Crupi, C. Ciofi, G. Iannacone, B. Neri, S. Lombardo, Current noise in a quantum point contact at the oxide hard-breakdown
12.10 - 12.30 a.m. A. Cester, L. Bandiera, A. Paccagnella, G. Ghidini, I. Bloom, Analysis and Modelling of the Soft Breakdown Current fluctuations
12.30 - 14.00 a.m. Lunch Time
 
GENERAL CONFERENCE
Session 1.2: Thin Oxide Modeling
Chairpersons: Pierre Fazan, Fred Koch
14.00 - 14.20 p.m. A. Ghetti G. Campardo, R. Micheloni
Characterization and Modelling of the Tunneling Current in Si/SiO2/Si Structures
14.20 - 14.40 p.m.
14.40 - 15.00 p.m. M. Staedele, B. Fischer, B. Tuttle, K. Hess, Direct and defect-assisted tunneling
15.00 - 15.20 p.m. M. Alam, B. Weir, J. Bude, B. Silverman, A. Ghetti
A Computational Model for Oxide Breakdown: Theory and Experiments
15.20 - 15.40 p.m.
15.40 - 16.00 p.m. J. Suñé, E. Wu, Modeling breakdown and breakdown statistics of ultrathin SiO2 gate oxides
16.00 - 16.20 p.m. B. Kaczer, R. Degreave, A. de Keersgieter, M. Rasras, G. Groeseneken, Explanation of nMOSFET substrate current after hard gate oxide breakdown
 
WORKSHOP ON MEMORIES
Session M.1: Memory architectures and reliability
Chairpersons: Alessandro Paccagnella, Frans Widdershoven
14.00 - 14.20 p.m. G. Campardo, R. Micheloni
Architecture of Non Volatile Memory with Multi-bit cells
14.20 - 14.40 p.m.
14.40 - 15.00 p.m. A. Scarpa, G. Tao, j. Dijkstra, F. J. Kuper, Tail bit implications in advanced 2T flash memory device reliability
15.00 - 15.20 p.m. D. Ielmini, A. S. Spinelli, A. L. Lacaita, A. Modelli, A New Two-Trap Tunneling Model for the Anomalous SILC in Flash Memories
15.20 - 15.40 p.m. A. Chimenton, P. Pellati, P. Olivo, Threshold voltage spread in Flash Memories under a constant DQ erasing scheme
15.40 - 16.00 p.m. D-S. Kuo, C. Wan, S. Chu, MS Liang, CS Tsai, HJ Tao, YC Huang, JP Wu, YT Chen, JD Chih, CH Hsieh, HC Sung, JK Yeh, CJ Lin, SH lin, CT Hsieh, WT Chu, HP Chen, CY Hsu, DS Shyu, SP Peng, TJ Fong, KY Lee, SC Wong A Flash-based SOC Technology Using Split-gate Cell
16.00 - 16.20 p.m.
  WINE AND CHEESE RECEPTION
 
Session P.1: Poster Session
Chairpersons: Valery V. Afanas’ev, Hisham Massoud, Max Schultz
17.30 - 18.30 p.m. W.D. Zhang, J. F. Zhang, M. J. Uren, J. Groeseneken, R. Degraeve, M. Lalor, D. Burton, Dependence of energy distributions of interface states on stress conditions
A. Bongiorno, A. Pasquarello, Oxygen diffusion in amorphous SiO2: A first-principle investigation
T. Gebel, J. von Borany, H. J. Thees, M. Wittmaack, K. H. Stegemann, W. Skorupa, Non-volatile memories based on Si+ -implanted Gate oxides
G. Borsoni, V. Le Roux, R. Laftitte, M. L. Korwin-Pawlowski, C. Vannuffel, F. Bertin, C. Vergnaud, A. Chabli, C. Wyon, Dependence of Ultra Thin SiO2 Layers Formation by Ultra Slow Single and Multicharged Ions on Process Conditions
J.R. Schwank, M. R. Shaneyfelt, T. L. Meisenheimer, B. L. Draper, A Silicon-on-Insulator Non-Volatile Field-Effect Transistor Memory
D.-O. Lee, P. Roman, C. T. Wu, B. Mahoney, M. Horn, P. Mumbauer, M. Brubaker, R. Grant, J. Ruzyllo, Studies of Liquid Misted Deposited High-k Dielectrics for MOS Gates
G. Lloyd, N. Sedghi, M.Raja, I. Sellers, S. Higgins, R. Di Lucrezia, B. Eccleston, The Properties of MOS Stuctures using Conjugated Polymers as the Semiconductor
M.I. Vexler, N. Asli, A. F. Shulekin, B. Meinerzhagen, P. Seegebrecht, Compact Quantum Model for a Silicon MOS Tunnel Diode
A. Bravaix, D. Goguenheim, N. Revil, E. Vincent, Hot-Carrier Reliability study of Second and First Impact Ionization degradation in 0.15 micron Channel-Length N-MOSFET's
S. Huth, O. Breitenstein, A. Huber, D. Dantz, U. Lambert, Localization and detailed investigation of gate oxide integrity defects in silicon MOS structures
F. Lime, R. Clerc, G. Ghibaudo, G. Pananakakis, G. Guégan, Impact of Gate Tunneling Leakage on the Operation of nMOS Transistors with Ultra Thin Gate Oxides
H.N. Al-Shareef, G. Bersuker, C. Lim, G. A. Brown, R. W. Murto, H. R. Huff, Nitridation of Gate Dielectrics By Remote Plasma (RPN) and Decoupled Plasma (DPN) Nitridation
V.N. Dobrovolsky, L. V. Ishchuk, G. K. Ninidze, Reversed Electron-Hole Pair Transport in SOI Structure
F. Rahmoune, D. Bauza, Si-SiO2 interface trap capture properties
P.J. Macfarlane, R. E. Stahlbush, Trapping Dependent H+ Motion in SIMOX Buried Oxides
 
THURSDAY, June 21, 2001
GENERAL CONFERENCE
Session 2.1: Oxide and Interface Characterization Techniques

Chairperson: Henryk Przewlocki
09.00 - 09.20 a.m. R. Ludeke, E. Cartier, Imaging of oxide and interface charge in SiO2 / Si
09.20 - 09.40 a.m. M. Porti, M. Nafrìa, X. Aymerich, B. Ebesberger, A. Olbrich, Propagation of the SiO2 Breakdown event on MOS stuctures observed with Conductive Atomic Force Microscopy
09.40 - 10.00 a.m. F. Widdershoven, Extraction of gate oxide thickness from C-V measurements
10.00 - 10.20 a.m. C. Leroux, G. Ghibaudo, G. Reimbold, R. Clerc, Extraction of oxide thickness in the nanometer range using C(V) characteristics
10.20 - 10.50 a.m. Coffee Break and poster session
   
Session 2.2: New Memory Devices
Chairperson: Alberto Modelli
10.50 - 11.10 a.m. I. Bloom, P. Pavan, B. Eitan
NROM - a New Non Volatile Memory Technology: from Device to Products
11.10 - 11.30 a.m.
11.30 - 11.50 a.m. R. van Schaijk, N. Wils, M. Slotboom, F. Widdershoven, Compact poly-CMP embedded flash memory
11.50 - 12.10 a.m. D. Esseni, L. Selmi, BipFLASH: A Novel Non Volatile Memory Cell Concept for High Speed - Low Power Applications
12.10 - 12.30 a.m. H. Takasu
Ferroelectric Memories and Their Applications
12.30 - 12.50 a.m.
12.50 - 14.20 a.m.
Lunch Time
 
HIGH K DIELECTRICS WORKSHOP
Session K.1: High-k Material Properties
Chairpersons: Martin Green, Hiroshi Iwai
09.00 - 09.20 a.m. M. Heyns, H. Bender, R. Carter, M. Caymax, T. Conard, S. De Gendt, R. Degraeve, H. De Witte, G. Groeseneken, S. Haukka, K. Hanson, M. Houssa, S. Kubicek, G. W. Maes, M. Naili, H. Nohira, W. Tsai, M. Tuominen, W. Vandervorst, R. Wilhelm, E. Yang, C. Zhao
High-k dielectric materials prepared by Atomic Layer CVD
09.20 - 09.40 a.m.
09.40 - 10.00 a.m. G. Lucovsky, Electron Structure on Transition Metal Atoms in Silicate Alloys: Contribution to Bulk Interface Gate Dielectric Properties
10.00 - 10.20 a.m. V.V. Afanas'ev, M. Houssa, A. Stesmans, M.M. Heyns, Energy Barriers between (100) Si and Al2O3 and ZrO2-Based Dielectric Stacks: Internal Electron Photo Emission Measurements
10.20 - 10.50 a.m. Coffee Break and poster session
 
Session K.2: Process Integration and Reliability
Chairpersons: Martin Green, Hiroshi Iwai
10.50 - 11.10 a.m. E.P. Gusev, E. Cartier, D.A. Buchanan, M. Gribelyuk, M. Copel, A. Callegari, H.Okorn-Schmidt, C. D'Enic, P. Kozlowski
Ultrathin High-K Metal Oxides on Silicon: Processing Characterisation and Integration Issues
11.10 - 11.30 a.m.
11.30 - 11.50 a.m. L. Manchanda, M. D. Morris, M. L. Green, R. B. van Dover, F. Klemens, T. W. Sorsch, P.J. Silverman, G. WilK, B. Busch, S. Arvamudhan
Multi-component High Key Gate Dielectrics for the Silicon Industry
11.50 - 12.10 a.m.
12.10 - 12.30 a.m. S.A. Campbell, T.Z. Ma, R. Smith, W. L. Gladfelter, F. Chen, High Mobility HfO2 N- and P- Channel Transistors
12.30 - 12.50 a.m. M. Houssa, V.V. Afanas'ev, A. Stesmans, M.M. Heyns, Defect generation in ultra-thin SiO2 gate layers and SiO2/ZrO2 gate stacks and the dispersive transport model
12.50 - 14.20 a.m. Lunch Time
14.45 - 20.00 a.m. TOUR
20.00 - 24.00 a.m. GALA DINNER
 
FRIDAY, June 22, 2001
GENERAL CONFERENCE
Session 3.1: Technology
Chairpersons: Andre Stesmans
09.00 - 09.20 a.m. B.J. Mrstik, H.L. Huges, P. J. McMarr, Reduction in DVfb During Hole Injection in Thermal Oxides that have been Ion Implanted
09.20 - 09.40 a.m. J. Diener, D. Kovalev, F. Koch, Resonant Energy Transfer at the Silicon-Silicon Oxide Interface and the Possibility of Nonthermal Processing
09.40 - 10.00 a.m. W. Eccleston, Carrier generation and current flow at the interface between polysilicon and an SiO2 gate dielectrics
10.00 - 10.20 a.m. H. Kageshima, M. Uematsu, K. Shiraishi
Theory of Si thermal oxide growth rate taking into account interfacial Si emission effects
10.20 - 10.40 a.m.
10.40 - 11.10 a.m. Coffee Break and poster session
 
Session 3.2: Alternative Dielectrics and Reliability
Chairpersons: Joan Ramon Morante
11.10 - 11.30 a.m. S. Miyazaki, M. Narasaki, M. Ogasawara, M. Hirose, Characterization of Ultrathin Zirconium Oxide Films on Silicon Using Photoelectrons Spectroscopy
11.30 - 11.50 a.m. M.L. Polignano, C. Carpanese, B. Crivelli, A. Giussani, R. Zonca, M. Bersani, M. Sbetti, Interface properties of annealed and nitrided HTO layers
11.50 - 12.10 a.m. R.S. Johnson, G.Lucowsky, J. G. Hong, Fixed Charge and Interface Traps at Interfaces between Si (100) and Al2O3 and Ta2O5-Al2O3 alloys
12.10 - 12.30 a.m. R.E. Stahlbush, P. J. Macfarlane, Interface Traps and Bulk Defects in SiC MOSFETs Studied by Light Emission
12.30 - 12.50 a.m. T. Dittrich, T. Bitzer, T. Rada, N. V. Richardson, V. Yu. Timoshenko, J. Rappich, F. Koch, Defect transformation under growth of submonolayer oxides on silicon surfaces at low temperatures
12.50 - 14.20 a.m. Lunch Time
 
SOI WORKSHOP
Session S.1: Transport properties in SOI devices
Chairpersons: Sorin Cristoloveanu
09.00 - 09.20 a.m. M. Mastrapasqua, D. Esseni, G.K. Celler, C. Fiegna, L. Selmi, E. Sangiorgi Measurements of low field mobility in ultra-thin SOI n- and p-MOSFETs
09.20 - 09.40 a.m.
09.40 - 10.00 a.m. J. Walczak, B. Majkusiak, The Remote Roughness Mobility resulting from the Ultrathin SiO2 Thichness Nonuniformity in the DG SOI and Bulk MOS Transistors
10.00 - 10.20 a.m. F. Gámiz, J.B.Roldàn, J. A. Lòpez-Villanueva, F. Jiménez-Molinos, Electron transport in ultrathin Silicon-On-Insulator structures
10.20 - 10.40 a.m. A. Kumar, Rakesh Lal, V. Ramgopal Rao, A Simple and Direct Technique for Interface Characterisation of SOI - MOSFETs and its Application in Sub 100nm JVD-MNSFETs
10.40 - 11.10 a.m. Coffee Break and poster session
 
Session S.2: New SOI Device Concepts
Chairpersons: William Eccleston
11.10 - 11.30 a.m. Y. Ono, Y. Takahashi, H. Namatsu Single-Electron and Quantum SOI Devices
11.30 - 11.50 a.m.
11.50 - 12.10 a.m. J. Pretet, S. Cristoloveanu, N. Hefeyene, M. Matsui, Y. Moriyasu, Y. Kawakami, Electrical evaluation of innovating processes for SOS materials
12.10 - 12.30 a.m. M. Bain, B.M. Armstrong, H. Gamble, H. A. W. El Mubarek, P. Ashburn, A. C. Lamb, S. Hall, SiGe HBTs on Bonded Wafer Substrates
12.30 - 12.50 a.m. I. Lagnado, P. de la Houssaye, T. F. Kuech, P. Moran, Integration of Si and and SiGe with Al2O3 (sapphire)
12.50 - 14.20 a.m. Lunch Time
 
GENERAL CONFERENCE
Session 3.3: Thin Oxide Reliability

Chiarpersons: Jordi Sune, Gilles Reimbold
14.20 - 14.40 p.m. D. Esseni, J. D. Bude, L. Selmi, Experimental Evidence of Low Voltage Anode Hole Injection in Thin Oxides
14.40 - 15.00 p.m. K. Komiya, Y. Omura, Spectroscopic Analysis of Stress-Induced Defects in Thin Silicon Oxide Films
15.00 - 15.20 p.m. J.F. Zhang, C. Z. Zhao, G. Groeseneken, R. Degraeve, J. N. Ellis, C. D. Beech, Relation between hole traps and non- reactive hydrogen induced positive charges
15.20 - 15.40 p.m. E.M. Vogel, M. D. Edelstein, J. S. Suehle
Reliability of Ultrathin Silicon Dioxide Under Substrate Hot-electron, Substrate Hot-hole, and Tunneling Stress
15.40 - 16.00 p.m.
16.00 - 16.20 p.m. V.V. Afanas'ev, A. Stesmans, Positive Charging of Thermal SiO2 Layers: Hole Trapping versus Proton Trapping
16.20 - 16.40 p.m. W.D. Zhang, J. F. Zhang, M. Lalor, B. Burton, G. Groeseneken, R. Degraeve, On the mechanism of electrone trap generation in gate oxides
16.40 - 16.45 p.m. Conference closing
 
SOI WORKSHOP
Session S.3: Transient Effects and Reliability of SOI Devices

Chairpersons: Olof Engstrom, James Stathis
14.20 - 14.40 p.m. R. Zingg
High-voltage, double-gate devices on SOI
14.40 - 15.00 p.m.
15.00 - 15.20 p.m. S. Okhonin, M. Nagoga, J.-M. Sallese, P. Fazan, O. Faynot, J. Pontcharra, S. Cristoloveanu, Transient effects in PD SOI NMOSFETs
15.20 - 15.40 p.m. W.K. Yeh, C. Huang, T. F. Chen, Sungmu. Hsu, J. Liu, F. T. Liou, Thermal effect of 0.1 um Partialy Depleted SOI CMOSFET
15.40 - 16.00 p.m. J. Pretet, N. Subba, D. Ioannu, S. Cristoloveanu, W. Maszara, C. Raynaud, Channel-width dependance of floating body effects in STI- and LOCOS- isolated MOSFETS
16.00 - 16.20 p.m. A. Vandooren, J. F. Conley, S. Cristoloveanu, L. M. Mojarradi, E. Kolowa, Degradation Mechanisms in SOI n-channel LDMOSFETs
16.20 - 16.40 p.m. A. Rivera, A. van Veen, H. Schut, J. M. M. de Nijs, P. Balk, Deuterium interactions with buried oxides
16.40 - 16.45 p.m. Conference closing